000 | 01310cam a2200337 i 4500 | ||
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999 |
_c82366 _d82366 |
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001 | 17607500 | ||
003 | CITU | ||
005 | 20220602104545.0 | ||
008 | 130130s2014 nyu 000 0 eng | ||
010 | _a 2012042163 | ||
020 | _a9780073380544 (alk. paper) | ||
020 | _a9781259072031 | ||
040 |
_aCITU LRAC _beng _cDLC _erda _dDLC |
||
050 | 0 | 0 |
_aTK7868.L6 _bB76 2014 |
082 | 0 | 0 |
_a621.392 _223 |
100 | 1 |
_aBrown, Stephen D., _eauthor. |
|
245 | 1 | 0 |
_aFundamentals of digital logic with Verilog design / _cStephen Brown and Zvonko Vranesic, Department of Electrical and Computer Engineering, University of Toronto. |
250 | _aThird edition. | ||
264 | 1 |
_aNew York : _bMcGraw-Hill Higher Education, _c[2014] |
|
300 |
_axvi, 847 pages ; _c24 cm |
||
336 |
_atext _2rdacontent _btxt |
||
337 |
_aunmediated _2rdamedia _bn |
||
338 |
_avolume _2rdacarrier _bnc |
||
650 | 0 |
_aLogic circuits _xDesign and construction _xData processing. |
|
650 | 0 | _aVerilog (Computer hardware description language) | |
650 | 0 | _aComputer-aided design. | |
700 | 1 | _aVranesic, Zvonko G. | |
906 |
_a7 _bcbc _corignew _d1 _eecip _f20 _gy-gencatlg |
||
942 |
_2ddc _cBK |