Fundamentals of digital logic with Verilog design / (Record no. 82366)

000 -LEADER
fixed length control field 01310cam a2200337 i 4500
001 - CONTROL NUMBER
control field 17607500
003 - CONTROL NUMBER IDENTIFIER
control field CITU
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220602104545.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 130130s2014 nyu 000 0 eng
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER
LC control number 2012042163
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780073380544 (alk. paper)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781259072031
040 ## - CATALOGING SOURCE
Original cataloging agency CITU LRAC
Language of cataloging eng
Transcribing agency DLC
Description conventions rda
Modifying agency DLC
050 00 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7868.L6
Item number B76 2014
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.392
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Preferred name for the person Brown, Stephen D.,
Relator term author.
245 10 - TITLE STATEMENT
Title Fundamentals of digital logic with Verilog design /
Statement of responsibility, etc Stephen Brown and Zvonko Vranesic, Department of Electrical and Computer Engineering, University of Toronto.
250 ## - EDITION STATEMENT
Edition statement Third edition.
264 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc New York :
Name of publisher, distributor, etc McGraw-Hill Higher Education,
Date of publication, distribution, etc [2014]
300 ## - PHYSICAL DESCRIPTION
Extent xvi, 847 pages ;
Dimensions 24 cm
336 ## - CONTENT TYPE
Content type term text
Source rdacontent
Content type code txt
337 ## - MEDIA TYPE
Media type term unmediated
Source rdamedia
Media type code n
338 ## - CARRIER TYPE
Carrier type term volume
Source rdacarrier
Carrier type code nc
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Logic circuits
General subdivision Design and construction
-- Data processing.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Verilog (Computer hardware description language)
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer-aided design.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Vranesic, Zvonko G.
906 ## - LOCAL DATA ELEMENT F, LDF (RLIN)
a 7
b cbc
c orignew
d 1
e ecip
f 20
g y-gencatlg
942 ## - ADDED ENTRY ELEMENTS
Source of classification or shelving scheme
Item type BOOK
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Permanent Location Current Location Shelving location Date acquired Source of acquisition Cost, normal purchase price Inventory number Full call number Barcode Date last seen Price effective from Item type
          COLLEGE LIBRARY COLLEGE LIBRARY SUBJECT REFERENCE 2014-08-23 ALBASA 3222.00 45794 621.392 B815 2014 CITU-CL-45794 2022-06-02 2022-06-02 BOOK